Expert in microscale two-phase flow and heat transfer and modeling of micro-evaporators
John Thome
3D Stacked Architectures with Interlayer Cooling

Expert in thermal modeling of multiprocessor architectures and thermal management, hardware/software co-design methods
David Atienza
Expert in chip design, intelligent detector, VLSI design, high-level specification and synthesis, sensors development
Yusuf Leblebici
IBM Zürich
Expert in thermal packaging of high performance computers
Bruno Michel
IBM Zürich
Expert in micro-scale liquid phase cooling, nanofluid heat transfer and heat transfer modeling
Dimos Poulikakos
Expert in catalyst nanoparticles, nanomaterials and conception and characterization of nanofluids
Jan Wendelin Stark

Project Description

The project addresses interlayer cooling of 3D computer  chips, including water cooling, two-phase refrigerant cooling, development and perfection  of new micro-fabrication techniques  for TSVs and their connections, bonding  of stacked layers together, dynamic thermal modeling of 3D chips, and extensive experimental testing of2D and 3D cooling solutions and new thermal models. 

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Read the Project Presentation

Our researchers in the media

Notable publications

Angle-Of-Attack Investigation of Pin Fin Arrays in Non-Uniform Heat-Removal Cavities for Interlayer Cooled Chip Stacks
T. Brunschwiler, S. Paredes, U. Drechsler, B. Michel, B. Wunderle, H. Reichl,
SEMI-Therm, San Jose, CA, (2011)

Attaining Single-Chip, High-Performance Computing Through 3D Systems with Active Cooling
A. K. Coskun, D. Atienza, M. Sabry, J. Meng,
IEEE Micro Magazine, ISSN: 0272-1732, IEEE Press, (7, 2011)

Cooling of next generation computer chips: parametric study for single- and two-phase cooling
Y. Madhour, S. Zimmermann, J. Olivier, J.R. Thome, B. Michel and D. Poulikakos
THERMINIC Conference Proceedings (7, 2011)

Design Methods and Tools for 3D Integration
G. De Micheli, V. Pavlidis, D. Atienza Alonso, and Y. Leblebici,
In Proceedings of the Symposium on VLSI Technology", (7, 2011)


Posters from 2013

Intra chip stack fluidic cooling: the CMOSAIC demonstrator
Yassir Madhour, Michail Zervas, Brian P. D%u2019Entremont, Thomas Brunschwiler, Gerd Schlottig, Bruno Michel, Yusuf Leblebici and John Richard Thome

Integrated Water Cooling of 3D Electronic Chips
Adrian Renfer, Fabio Alfieri, Manish K. Tiwari, Thomas Brunschwiler, Bruno Michel, Dimos Poulikakos

Superhydrophobic surfaces
Michael Rossier, Daniela Paunescu, Wendelin Jan Stark

EDA for CMOSAIC: a new generation of CAD tools for liquid-cooled 2D/3D ICs
Arvind Sridhar, Mohamed Sabry, Alessandro Vincenzi, David Atienza, Thomas Brunschwiler


Posters from 2012

Posters from 2011

Superhydrophobic surfaces
Michael Rossier, Jan Wendelin Stark

Integrated Single Phase Water Cooling of 3D Chips: Modeling and Experiments
Adrian Renfer, Fabio Alfieri, Manish Tiwari, Igor Zinovik, Thomas Brunschwiler, Bruno Michel, Dimos Poulikakos

Die-Level Through-Silicon-Via (TSV) Fabrication Platform
Yuksel Temiz, Michael Zervas, Carlotta Guiducci, Yusuf Leblebici

Wafer level TSV compatible to liquid cooling high performance CMOS
Michael Zervas, Yuksel Temiz, Yusuf Leblebici


Project Photos